机读格式显示(MARC)

• 000 01128cam a22003254a 4500

• 001 0000386342

• 005 20111216150100.0

• 008 090426s2009 ne a b 001 0 eng d

• 035 __ |a (DLC)15714138

• 035 __ |a (DLC)2009417828

• 010 __ |a 2009417828

• 020 __ |a 9781856176217 (pbk.)

• 020 __ |a 1856176215 (pbk.)

• 035 __ |a (OCoLC)ocn255903260

• 040 __ |a BTCTA |c BTCTA |d YDXCP |d BWX |d OCLCQ |d DLC

• 042 __ |a lccopycat

• 050 00 |a TK7895.G36 |b F64 2009

• 090 __ |a TN492/BM1

• 093 __ |a TN492 |2 4

• 245 00 |a FPGAs / |c Clive "Max" Maxfield [editor] ; with W. Bolton ... [et al.].

• 260 __ |a Amsterdam ; |a Boston : |b Newnes/Elsevier, |c c2009.

• 300 __ |a xix, 452, [12] p. : |b ill. ; |c 24 cm.

• 490 1_ |a Newnes world class designs series

• 504 __ |a Includes bibliographical references and index.

• 650 _0 |a Field programmable gate arrays.

• 650 _0 |a Field programmable gate arrays |x Design and construction.

• 700 1_ |a Maxfield, Clive, |d 1957-

• 830 _0 |a World class designs.

• 856 41 |3 Table of contents only |u http://www.loc.gov/catdir/toc/fy0906/2009417828.html

• 920 __ |a 233030 |z 2