机读格式显示(MARC)

• 000 01138cam a2200325 a 4500

• 001 0000375082

• 005 20100927102500.0

• 008 070813s2008 njua b 001 0 eng

• 010 __ |a 2007033487

• 020 __ |a 9780471704492 (cloth)

• 020 __ |a 0471704490 (cloth)

• 035 __ |a (OCoLC)ocn164570922

• 035 __ |a (OCoLC)164570922 |z (OCoLC)150384742

• 040 __ |a DLC |c DLC |d BAKER |d BTCTA |d YDXCP |d UKM |d C#P |d IXA |d DLC

• 050 00 |a TK7874.58 |b .Y64 2008

• 082 00 |a 621.3815/48 |2 22

• 090 __ |a TN407/BY1

• 093 __ |a TN407 |2 4

• 100 1_ |a Yoeli, Michael, |d 1917-

• 245 10 |a Verification of systems and circuits using LOTOS, Petri Nets, and CCS / |c by Michael Yoeli and Rakefet Kol.

• 260 __ |a Hoboken, N.J. : |b Wiley-Interscience, |c c2008.

• 300 __ |a xv, 231 p. : |b ill. ; |c 25 cm.

• 440 _0 |a Wiley series on parallel and distributed computing

• 504 __ |a Includes bibliographical references and index.

• 650 _0 |a Integrated circuits |x Verification.

• 650 _0 |a Computer software |x Verification.

• 650 _0 |a LOTOS (Computer program language)

• 650 _0 |a Petri nets.

• 700 1_ |a Kol, Rakefet.

• 920 __ |a 233030 |z 2